This invention relates to switch control in quantized power converters.
Switching power converters transfer power from an input source to a load by closing and opening a switch during each of a series of converter operating cycles. It will be useful to broadly separate such converters into two categories: PWM (pulse-width modulated) converters in which the rise and fall of switch current and voltage during switch transitions (e.g., changes between conductive and a non-conductive states) are theoretically instantaneous and in which there is no natural time constant built into the converter which smoothes the rise and fall of switch current or voltage during each converter operating cycle; and a class of converters, which will be referred to collectively herein as "quantized converters," in which inductance and capacitance in the converter introduce a natural time constant for the rise and fall of switch voltage or current during each converter operating cycle.
One class of quantized converters, including those generally referred to as "resonant," "quasi-resonant," or "multi-resonant" types, are of the kind in which the switch current or voltage rise and fall with a natural time constant throughout essentially the entire time that the switch is opened or closed. This class of converters includes zero-current switching converters (see, for example, Vinciarelli, "Forward Converter Switching at Zero Current," U.S. Pat. No. 4,415,959; Vinciarelli, et al, "Boost Switching Power Conversion," U.S. Pat. No. 5,321,348; Lee, et al, "Zero-Current Switching Quasi-Resonant Converters Operating in a Full-Wave Mode," all incorporated by reference) and zero-voltage switching converters (see, for example, Lee, et al, "Zero-Voltage Switching Quasi-Resonant Converters," U.S. Pat. No. 4,720,668; Tabisz, et al, Zero-Voltage Switched Multi-Resonant Converters Including the Buck and Forward Type," U.S. Pat. No. 4,857,822, all incorporated by reference). In such converters the inductance and capacitance perform two important functions: they set a characteristic time scale for the smooth rise and fall of voltages and currents within the converter during each converter operating cycle, and they create switch conditions during an operating cycle when the switch may be opened or closed at zero voltage or current. Another class of quantized converters, which blend PWM and quantized characteristics, include "soft-switching," "resonant transition" or "resonant switching" converters. In typical converters of this kind a natural time constant is exploited (sometimes in association with the transitioning of "auxiliary" switches) only during portions of the operating cycle which are near the times of transition of a main switching element; the effect of the natural time constant on currents or voltages during these portions of the cycle allows the main switching element to be transitioned with low switching loss. A converter of this kind (e.g., of the kind described in Hua, et al, "A New Class of Zero-Voltage Switched PWM Converters," High-Frequency Resonant and Soft-Switching PWM Converters, Volume IV of the VPEC Publication Series, 1991, p. 193, incorporated by reference), and converter operating waveforms, are shown in FIGS. 26 and 27, respectively. Other converters of this kind are described in Hua, et al, op. cit., p. 215 and in Mammano, "Resonant Mode Converter Topologies--Additional Topics," Unitrode Power Supply Design Seminar, SEM-700 Handbook, 1990.
In general, then, a quantized converter incorporates a natural time constant (which is typically significantly greater than the rise and fall times of the non-ideal switch in the converter) as a means of setting up switch conditions which are conducive to turning the switch on or off at low loss (e.g., at zero current or voltage). In contrast to pure PWM converters, in which the simultaneous presence of significant current and voltage during the opening and/or closing of non-ideal switching elements results in switching losses, the process of switching at zero voltage or current in quantized converters substantially reduces such losses. As a result, conversion efficiency is improved, converter operating frequency may be increased, and the size of energy storage elements within the converter, and hence the size of the converter itself, may be decreased.
In general, the extent to which the benefits of a quantized conversion can be achieved will depend, in part, on the accuracy of the timing of the opening and closing of the switching elements during the operating cycle. For example, FIG. 1 shows a zero-current switching (ZCS) converter 10 of the kind described in Vinciarelli, U.S. Pat. No. 4,415,959. The waveforms of the converter secondary and primary currents, Is1 and Ip, respectively, are shown in FIGS. 2A and 2B for the case where the switch 22 is opened at precisely the time at which the secondary current returns to zero (e.g., at time t=t4). Since the primary current, Ip, is the sum of the primary-reflected secondary current (e.g., Is1/N, where N is the turns ratio of the transformer 15) and the transformer magnetizing current, Imag1, the primary current will be equal to Ip(t4)=Imag1(t4) when the switch 22 is opened. In general, in a properly designed ZCS converter, the value of Imag1(t4) is a very small fraction of the peak value of the current Ip and the losses associated with opening the switch at t=t4 will be small. If the switch is opened too soon, however, e.g., at time t=te in FIG. 3A, then the switch will interrupt a current, Ip(te), which may be substantially greater than Imag1(t4). If, on the other hand, as illustrated in FIG. 3B, the switch is opened too late, e.g., at times t=tm in FIG. 3B, then the switch will have to interrupt a current which is greater than the current Imag(t4). In either case, the inaccuracy in switch timing will result in increased switching losses, reduced conversion efficiency and increased converter conducted and radiated noise.
In another example, a schematic and waveforms for a prior art zero-voltage switching (ZVS) forward converter 7 (Tabisz, et al, U.S. Pat. No. 4,857,822) are shown in FIGS. 21 and 22. In the ZVS converter the closing of the switch 11 takes place at zero voltage (e.g, at time t=t4, FIG. 22). If the switch is closed too soon or too late, relative to time t4, the voltage across the switch, Vsw, will be non-zero when the switch closes and this will result in problems similar to those cited above for inaccurate switch timing in the ZCS converter.
One prior art method of generating a switch turn-off signal in a ZCS converter is shown in FIG. 1. In the Figure, a switch turn-off sensor 80 includes a current transformer 82, a pair of diodes 84, 86 and a bias source 88. When the switch 22 is closed, at time t=t1, a primary current, Ip, flows in the current transformer primary winding 83. This induces a current, Is2, to flow in the current transformer secondary winding 85 and in diodes 84, 86, resulting the voltage Vt having a negative value equal to one diode drop. Since, as illustrated in FIG. 4B, the secondary current of the current transformer, Is2, is equal to the difference between the primary current, Ip (FIG. 4A), and the magnetizing current in the current transformer 82, Imag2 (also shown in FIG. 4A), the current Is2 will "lead" the current Ip and Is1 will reverse at time t=tx, prior to time t=t4 (e.g., the time at which the secondary current, Is1, of transformer 15 returns to zero). As Is2 reverses, the diodes 84, 86 cease conducting and the voltage Vt goes sharply positive via the parasitic impedances of the diodes. This positive voltage causes the output of the comparator 71 to go positive, resetting the latch 72 and turning off the switch. In practice, the design of the current transformer is adjusted to provide a time lead (e.g., t4-tx, FIGS. 4A and 4B) which compensates for circuit delays in non-ideal components, e.g., delays in the comparator 71 and latch 72 and the response time of the switch 22.
A prior art method for closing the switches 11,311 in the ZVS converters of FIGS. 21 and 26 is shown in FIG. 23. In the Figure, turn-off pulses reset flip-flop 19 and turn the switch off (e.g., at time t=t2, FIG. 22). When the switch voltage, Vsw, returns to zero at time t=t4, the rising edge of the output of comparator 13 sets edge-triggered flip-flop 19 turning the switch on.